 |  Compare Price & Save up to 90% | | |
|
| Login | Sign Up | Settings | Sell Books | Wish List |
| Searching ... |
| 0 % | ||
 | | Verilog HDL(2nd Edition) by Samir Palnitkar, Prabhu Goel Hardcover, 496 Pages, Published 2003 by Prentice Hall ISBN-13: 978-0-13-044911-5, ISBN: 0-13-044911-3 |
 | | Design Verification with e(1st Edition) by Samir Palnitkar Hardcover, 416 Pages, Published 2003 by Prentice Hall ISBN-13: 978-0-13-141309-2, ISBN: 0-13-141309-0 |
 | | Verilog HDL(2nd Edition) by Palnitkar Samir B. Paperback, 496 Pages, Published 2003 by Prentice Hall ISBN-13: 978-0-13-259970-2, ISBN: 0-13-259970-8 |
 | | Verilog HDL by Samir Palnitkar Hardcover, 396 Pages, Published 1996 by Prentice Hall Ptr ISBN-13: 978-0-13-451675-2, ISBN: 0-13-451675-3 |
 | | Design Verification With E(1st Edition) by Palnitkar Samir Paperback, 416 Pages, Published 2005 by Dorling Kindesley Pearson Education ISBN-13: 978-81-297-0537-2, ISBN: 81-297-0537-0 |
 | | Verilog HDL A Guide to Digital Design and Synthesis - Low Price Edition(2nd Edition) by Palnitkar Samir, Prabhu Palnitkar Goel, S.帕尔尼卡, Pearson India Paperback, 496 Pages, Published 2003 by Pearson India ISBN-13: 978-81-7758-918-4, ISBN: 81-7758-918-0 |
 | | Design Verification with AýEaý by Samir Palnitkar Paperback, Published 2008 by Pearson Education/Ph Ptr ISBN-13: 978-81-317-2139-1, ISBN: 81-317-2139-6 |
 | | Design Verification with by Samir Palnitkar 416 Pages, Published 2003 ISBN-13: 978-81-317-4063-7, ISBN: 81-317-4063-3 |
 | | Samir Palnitkar Biography ISBN-13: 978-1-979352-13-0, ISBN: 1-979352-13-5 |
 | | Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog by Vaibbhav Taraate 307 Pages, Published 2018 by Springer ISBN-13: 978-981-10-8776-9, ISBN: 981-10-8776-8 |
Palnitkar Samir
