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 | | Advanced ASIC Chip Synthesis: Using Synopsys Design Compiler and Primetime by Himanshu Bhatnagar ISBN-10: 0792385373 ISBN-10: 0-7923-8537-3 ISBN-13: 9780792385370 ISBN-13: 978-0-7923-8537-0 Hardcover 1999-05-31 Springer Find Lowest Price |
Editorials | ||
Product Description Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® describes the advanced concepts and techniques used for ASIC chip synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail. The emphasis of this book is on real-time application of Synopsys tools used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, sub-micron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-arounds described in detail. In addition, crucial issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basics of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solutions. Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® is intended for anyone who is involved in the ASIC design methodology, starting from RTL synthesis to final tape-out. Target audiences for this book are practicing ASIC design engineers and graduate students undertaking advanced courses in ASIC chip design and DFT techniques. From the Foreword: `This book, written by Himanshu Bhatnagar, provides a comprehensive overview of the ASIC design flow targeted for VDSM technologies using the Synopsis suite of tools. It emphasizes the practical issues faced by the semiconductor design engineer in terms of synthesis and the integration of front-end and back-end tools. Traditional design methodologies are challenged and unique solutions are offered to help define the next generation of ASIC design flows. The author provides numerous practical examples derived from real-world situations that will prove valuable to practicing ASIC design engineers as well as to students of advanced VLSI courses in ASIC design'. Dr Dwight W. Decker, Chairman and CEO, Conexant Systems, Inc., (Formerly, Rockwell Semiconductor Systems), Newport Beach, CA, USA. | ||
Reviews | ||
Practical Text As an ASIC designer I found this to be useful when doing synthesis work. If you are experienced in synthesis, synopsys online documentation and personal notes may prove as useful. I simply liked this text. The price is really not that far out of norm for technical books such as this one. | ||
very general; very short; and way over priced This book is very general even to readers who are unfamiliar with the topic. It is a waste of money. It is extremely short, I read the whole book in one day. It has bits and pieces here and there, but no fundamentals. This book is not useful, even to starters. | ||
very general; very short; not worth the money This book is extremely general. Even for readers who do not want to practice synthesis or timing analysis. It gives very few minor examples. It is not worth the money. I finished reading the book in 1 day. The information in this book is so shallow. I wasted my money. If you have access to the synopsys tools, it is much better to read the tools user guide. | ||
Advanced Asic Chip Synthesis: Using Synopsys Design Compiler This book offers nothing extra from Synopsys On-Line Documentation. It is simply over overpriced. | ||
Highly overpriced, bad English, poor typeset I got turned off from this book the moment I opened it, and before I even read a single line. It has huge font size (even larger, instead of smaller, for example scripts) and one-inch margins on top and bottom. (An O'Reilly book has 40% more information on same-sized page, and it's far easier to read.) Every other sentence contains a punctuation error. All this makes it hard to concentrate on the content. The content itself is good for the absolute beginner, but not much else. The example scripts have no useful comments. Several important concepts (wire-load models among them) are mentioned without explanation. Other concepts (such as false paths) are explained in a misleading way. The author may be a superb designer, but that does not automatically make him a decent writer. Also, shouldn't editors have caught the English language errors? | ||