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|  | | Digital Communication Receivers: Synchronization, Channel Estimation, and Signal Processing
by Heinrich Meyr, Marc Moeneclaey, Stefan A. Fechtel
Hardcover, 864 Pages, Published 1997 by Wiley-Interscience
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|  | | Synchronization in Digital Communication Volume I, Phase-, Frequency-Locked Loops, and Amplitude Control (Wiley Series in Telecommunications and Signal Processing)
by Heinrich Meyr, Gerd Ascheid
Hardcover, 510 Pages, Published 1990 by John Wiley & Sons
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|  | | Optimized ASIP Synthesis from Architecture Description Language Models (1st Edition)
by Oliver Schliebusch, Heinrich Meyr, Rainer Leupers
Hardcover, 193 Pages, Published 2007 by Springer, 1st Edition
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|  | | Design of Energy-Efficient Application-Specific Instruction Set Processors (1st Edition)
by Tilman Glökler, Heinrich Meyr
Hardcover, 240 Pages, Published 2004 by Springer, 1st Edition
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|  | | Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms (1st Edition)
by Andreas Wieferink, Heinrich Meyr, Rainer Leupers
Hardcover, 176 Pages, Published 2008 by Springer, 1st Edition
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|  | | Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms (1st Edition)
by Tim Kogel, Rainer Leupers, Heinrich Meyr
Hardcover, 199 Pages, Published 2006 by Springer, 1st Edition
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|  | | Synchronization in Digital Communications
by Heirich Meyr, G. Ascheid, Heinrich Meyr
Paperback, 110 Pages, Published 1990 by John Wiley & Sons
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|  | | Digital Communication Receivers - Synchronization, Channel Estimation and Signal Processing
by HEINRICH MOENECLAEY, MARC FECHTEL, STEFAN A. MEYR
Paperback, Published 1998 by JOHN WILEY AND SONS LTD
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|  | | DIGITAL COMMUNICATION RECEIVERS
by HEINRICH MOENECLAEY, MARC FECHTEL, STEFAN A. MEYR
Paperback, Published 1998 by JOHN WILEY AND SONS LTD
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